Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling - Ayan Mandal - Books - Springer-Verlag New York Inc. - 9781493948178 - August 23, 2016
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Ayan Mandal
Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling Softcover reprint of the original 1st ed. 2014 edition

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This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.

156 pages, 85 black & white illustrations, 10 colour illustrations, 21 black & white tables, biograp

Media Books     Paperback Book   (Book with soft cover and glued back)
Released August 23, 2016
ISBN13 9781493948178
Publishers Springer-Verlag New York Inc.
Pages 143
Dimensions 155 × 235 × 9 mm   ·   231 g
Language English  

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