Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling - Ayan Mandal - Books - Springer-Verlag New York Inc. - 9781461494041 - November 14, 2013
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Ayan Mandal
Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling 2014 edition

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This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.

160 pages, 85 black & white illustrations, 10 colour illustrations, 21 black & white tables, biograp

Media Books     Hardcover Book   (Book with hard spine and cover)
Released November 14, 2013
ISBN13 9781461494041
Publishers Springer-Verlag New York Inc.
Pages 143
Dimensions 155 × 235 × 15 mm   ·   340 g
Language English  

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